ARF Design Hiring for RTL Design Verification Engineer at Ranchi, Jharkhand, India

𝐍𝐨𝐰 𝐇𝐢𝐫𝐢𝐧𝐠: 𝐑𝐓𝐋 𝐕𝐞𝐫𝐢𝐟𝐢𝐜𝐚𝐭𝐢𝐨𝐧 𝐄𝐧𝐠𝐢𝐧𝐞𝐞𝐫 / 𝐋𝐞𝐚𝐝

Location: Bangalore/Ranchi/Bhubaneswar

notice Period: Immediate Joiner

Experience: 6-12 Years Experience

We’re seeking a skilled Sr RTL Verification Lead to join our team. As an IP Verification Engineer, you’ll be part of a highly motivated team responsible for DV for IPs like UCIe, HBM, PCIe, Bus logic, etc.

𝐐𝐮𝐚𝐥𝐢𝐟𝐢𝐜𝐚𝐭𝐢𝐨𝐧𝐬:

▶BE/ME/MTech/MS with 6 to 12 years of RTL verification experience.

▶Proficiency in advanced verification methodologies: ▶UVM/OVM/VMM/System Verilog, constrained random stimulus generation, assertion-based verification, and functional coverage techniques.

▶Familiarity with register verification standards and NLP/GLS verification flows.

▶Experience in IP level and sub-system level verification on protocols like PCI-E, UCIe, HBM, etc., is a strong plus.

▶Relevant experience in enabling and verifying controller interoperability testing at the sub-system level is advantageous.

Interested or know someone who might be? Drop me a message or send your resume to [email protected]

Skills: design,rtl verification,dv,ip,universal verification methodology (uvm),verilog,systemverilog